Project Tartarus: DOOM on RISC-V

Fri, 31 Jul 2026 00:00:00 +0000

The most important question in computing: “But can it run DOOM?”

As a Computer Science student whose background is primarily in software, hardware design always felt like a bit of a dark art. I knew how a CPU worked in theory from various courses, but dealing with gates, clock domains, and routing constraints not just on paper? That was somewhat new territory.

My descent into hardware started during a university lab based on the excellent Open Educational Resource HaDes-V. The goal was to guide hardware novices like myself through the process of building a pipelined 32-bit RISC-V processor, eventually bringing it to life on the Basys 3 FPGA Trainer Board. To my surprise, my base implementation worked (well, not on the first try, but testing, debugging and beer eventually solved any remaining issues). It ran C programs, pushed pixels to a VGA display, and handled basic printf() debugging over UART.

Riscv on n0pl4c3

Project Tartarus: DOOM on RISC-V